<jargon> Any stimulus compelling enough to yank one right out of hack mode. Classically used to describe being dragged away by an SO for immediate sex, but may also refer to more mundane interruptions such as a fire alarm going off in the near vicinity. Also called an NMI (non-maskable interrupt), especially in PC-land. [Jargon File] (2005-02-13)

In computer systems programming, an interrupt handler, also known as an interrupt service routine or ISR, is a special block of code associated with a specific interrupt condition. Interrupt handlers are initiated by hardware interrupts, software interrupt instructions, or software exceptions, and are used for implementing device drivers or transitions between protected modes of operation, such as system calls.

<software> A routine which is executed when an interrupt occurs. Interrupt handlers typically deal with low-level events in the hardware of a computer system such as a character arriving at a serial port or a tick of a real-time clock. Special care is required when writing an interrupt handler to ensure that either the interrupt which triggered the handler's execution is masked out (inhibitted) until the handler exits, or the handler is re-entrant so that multiple concurrent invocations will not interfere with each other. If interrupts are masked then the handler must execute as quickly as possible so that important events are not missed. This is often arranged by splitting the processing associated with the event into "upper" and "lower" halves. The lower part is the interrupt handler which masks out further interrupts as required, checks that the appropriate event has occurred (this may be necessary if several events share the same interrupt), services the interrupt, e.g. by reading a character from a UART and writing it to a queue, and re-enabling interrupts. The upper half executes as part of a user process. It waits until the interrupt handler has run. Normally the {operating system} is responsible for reactivating a process which is waiting for some low-level event. It detects this by a shared flag or by inspecting a shared queue or by some other synchronisation mechanism. It is important that the upper and lower halves do not interfere if an interrupt occurs during the execution of upper half code. This is usually ensured by disabling interrupts during critical sections of code such as removing a character from a queue. (2002-07-24)

Marcan priority is the hypothesis that the Gospel of Mark was the first of the three synoptic gospels to be written, and was used as a source by the other two (Matthew and Luke). It is a central element in discussion of the synoptic problem; the question of the documentary relationship among these three gospels.

Priority traffic signs indicate the order in which vehicles should pass intersection points. Vehicles often come into conflict with other vehicles and pedestrians because their intended courses of travel intersect, and thus interfere with each other's routes.

A raster interrupt (also called a horizontal blank interrupt) is an interrupt signal in a legacy computer system which is used for display timing. It is usually, though not always, generated by a system's graphics chip as the scan lines of a frame are being readied to send to the monitor for display.

In patent, industrial design rights and trademark laws, a priority right or right of priority is a time-limited right, triggered by the first filing of an application for a patent, an industrial design or a trademark respectively. The priority right allows the claimant to file a subsequent application in another country for the same invention, design, or trademark effective as of the date of filing the first application.

The Motorola 68000 family of processors can be at an interrupt priority level from 0 (no interrupt in progress) up to 7. While the processor is handling an interrupt at one level, it will ignore other interrupts at that level or lower. (1994-11-23)

The interrupt priority level (IPL) is a part of the current system interrupt state, which indicates the interrupt requests that will currently be accepted. The IPL may be indicated in hardware by the registers in a Programmable Interrupt Controller, or in software by a bitmask or integer value and source code of threads

<parallel> A technique for avoiding priority inversion by temporarily raising the prioriry of all processes that want to access a shared resource to the highest priority level of any of them. Priority inversion occurs where a low priority process, L is holding a resource required by a high priority process, H, but L is not running because a medium priority process, M is running. Under priority inheritance, L temporarily inherits H's priority, allowing L to run and release the resource H is waiting for. For example, an ambulance (H) is stuck behind a lorry (L) waiting at a junction (the shared resource) for a gap in a line of cars (M) using the junction. Applying priority inheritance, the cars give way to the lorry as they would to the ambulance, thus allowing the lorry and then the ambulance to use the junction. (2005-02-11)